The present invention relates generally to memory systems employed in computer systems, and in particular to nonvolatile memory systems, such as flash memory systems designed to emulate magnetic disk drive systems.
It is conventional to implement a memory system in an integrated circuit including an array of nonvolatile memory cells, such as flash memory cells, and circuitry for independently erasing selected blocks of the nonvolatile memory cells. A flash memory array circuit includes rows and columns of nonvolatile flash memory cells. Thus, each of the cells or storage locations of the flash memory array circuit are indexed by a row index and a column index.
Each column of cells of the flash memory array include n memory cells with each cell being implemented with a floating-gate n-channel transistor. The drains of all transistors of a column are connected to a bit line, and the gate of each of the transistors is connected to a different word line. The sources of the transistors are held at a source potential, such as ground, during a read or programming operation. Each memory cell is a nonvolatile memory cell since the transistor of each cell has a floating gate capable of semipermanent charge storage. The current drawn by each cell depends on the amount of charge stored on the cell""s floating gate. Thus, the charge stored on each floating gate determines a data value that is stored semipermanently in the corresponding cell. In a flash memory device, the charge stored on the floating gate of each cell is erasable by appropriately changing the voltage applied to the gate and source in a manner known in the art.
Typically, the cells of a flash memory array can be erased in blocks, such as boot blocks or sector-array blocks, or the entire integrated circuit chip can be erased at once using a bulk erase. Reads and writes are, however, typically performed on a random byte or word basis in conventional flash memory devices.
An example of a flash memory array is described in U.S. patent application Ser. No. 08/606,246, entitled xe2x80x9cSEGMENTED NON-VOLATILE MEMORY ARRAY WITH MULTIPLE SOURCES WITH IMPROVED WORD LINE CONTROL CIRCUITRY,xe2x80x9d filed on Feb. 23, 1996 and assigned to the assignee of the present application, which is herein incorporated by reference.
Flash memory systems have been employed to emulate magnetic disk drive systems. Typically, the flash memory system is implemented as a card for insertion into a computer system with a chip set mounted on the card. The chip set includes an onboard control and several memory chips controlled by the controller. Each memory chip implements an array of flash memory cells organized into independently erasable blocks.
Magnetic hard disk systems have dominated storage media for computers and related systems due to the low cost and high capacity of available magnetic hard disk systems. Consequently, virtually all computer systems use and support magnetic hard disk technology. For example, the dominant computer operating system is the DOS or disk operating system, which essentially is a software package used to manage a magnetic hard disk system. The DOS software was developed to support the physical characteristics of hard drive structures based on a supporting file structure having heads, cylinders, and sectors to facilitate storing and retrieving of data from the magnetic hard disk drive.
Magnetic hard disk drives operate by storing polarities on magnetic material which can be rewritten quickly and as often as desired. As a result, DOS uses a file structure that stores files at a given location which is updated by a rewrite of that location as information is changed. Essentially all locations in DOS are viewed as fixed and do not change over the life of a disk drive. Locations are easily updated by rewrites of the smallest supported block of the structure or a sector. In magnetic disk drives, a sector typically is referred to as 512 bytes of data where each byte includes 8 bits of data. DOS also employs clusters as a storage unit, which are merely logical groupings of sectors to form a more efficient way of storing files and tracking the files with less overhead.
Development of flash memory integrated circuits has permitted a new technology to offer an alternative to magnetic hard disk drives and offer advantages and capabilities that are difficult to support by hard disk drive characteristics and features. The low power, high ruggedness, and small sizes offered by solid state flash memory systems make such flash memory systems an attractive alternative to a magnetic hard disk drive system. Although a memory system implemented with flash memory technology may be more costly than a magnetic hard disk drive system, computers and other processing systems are currently being developed that take advantage of flash memory features.
Flash memory systems that emulate the storage characteristics of a magnetic hard disk drive preferably are structured to support storage of 512 byte blocks or sectors along with additional storage for overhead associated with mass storage, such as error correction code (ECC) bits and/or redundant bits. Typically, the flash memory array is made to respond to a host processor in a manner that looks similar to a magnetic disk assembly so that the operating system can store and retrieve data in a known manner and be easily integrated into a computer system including the host processor.
One approach to make a flash memory easily integratable into a host computer is to configure the flash memory as a storage array, and to load special software into the host to translate conventional operating system commands, such as DOS commands, into flash commands and procedures for assertion to the flash memory. This approach uses the host computing power to act as a controller for utility that manages the flash memory rather than including such a controller in the flash memory itself.
A second approach to make a flash memory easily integratable into a host computer is to make the interface to the flash memory essentially identical to a conventional interface to a conventional magnetic hard disk drive. This approach has been adopted by the PCMCIA standardization committee which has promulgated a standard for supporting flash memory systems with a hard disk drive protocol. A flash memory card including one or more flash memory array chips and having an interface meeting this PCMCIA standard can be plugged into a host system having a standard DOS operating system with a PCMCIA-ATA (or standard ATA) interface. Such a flash memory card is designed to match standard interfaces, but must include an onboard controller which manages each flash memory array independent of the host system.
The second approach has several advantages. First, there are no special system requirements for the host system, which permits ease of host system design. No extra memory is required in the host, which allows for better use of the host memory. In addition, the flash memory system runs independently of the host to free the host computer to do other tasks while the flash memory is storing or retrieving data from a flash memory array. The second approach does, however, require a controller onboard the flash memory to implement the equivalent of an operating system behind the PCMCIA interface.
In flash memory systems other than disk-emulation flash memory systems, typically an entire memory is written or erased or an entire decode block is written or erased at one time. In a disk-emulation system, however, the data is typically very dynamic and small portions of memory, such as individual rows of flash memory cells, are rewritten many times while other small portions of memory remain unchanged. In updating data, the controller writes data to free locations, such as rows of flash memory cells, and the memory is updated by the controller writing the new or updated data to other free rows not previously written, marking the previously written rows as old or obsolete and ready to be erased. The flash memory system emulating the disk system keeps track of these obsolete rows and erases an entire erased block when it becomes filled or almost filled with obsolete rows. Updated data to replace data in one row of one erased block can be placed in another erased block or even another decode block or possibly even a different flash memory chip. The constant rewriting and moving of files results in erased blocks being constantly programmed and erased. With the DOS operating system, it is typical for new files to be updated heavily and unused files to be not updated or never changed once generated. This typical use of files results in portions of memory being updated frequently while other areas remain stagnant or unchanged.
A file of data to be written to cells of a flash memory system which emulates a magnetic disk drive system typically consists of sectors of data. During writing of a file to cells of such a system, each of the sectors of data is typically written to a different row of cells or to another distinct set of cells which has capacity to store a sector of data, and which is thus sometimes denoted as a xe2x80x9csectorxe2x80x9d of cells.
In a flash memory system, writes of data to flash memory cells are slow and they cause wear on the cells. This wear limits the useful life of conventional flash memory systems and reduces the system""s overall reliability. There is a need in the art of flash memory systems which emulate magnetic disk drive systems and in other types of flash memory systems to reduce the number of writes to a flash memory array of cells that must be performed in order to keep the array updated.
The present invention provides a nonvolatile memory system including an array of nonvolatile memory cells organized into sets. Each set has sufficient memory cells to store a set of data. A buffer stores a first set of data to be written to the array. Error correction code (ECC) circuitry receives the first set of data and calculates first ECC check bits representative of the first set of data. ECC comparison circuitry compares the first ECC check bits with second ECC check bits representative of a second set of data stored previously in the array to generate an ECC comparison signal having a first state indicative of a match between the first and second ECC check bits and a second state indicative of a miscomparison between the first and second ECC check bits.
The first set of data is typically meant to be written to the array to replace the second set of data. One embodiment of the nonvolatile memory system includes a control engine that responds to the ECC comparison signal being in the second state to cause the nonvolatile memory system to write the first set of data from the buffer to the array. The control engine responds to the ECC comparison signal being in the first state to either prevent a write of the first set of data to the array or preferably to cause a comparator to compare the first set of data stored in the buffer with a second set of data stored in the array to generate a set comparison signal having a first state indicative of a match between the first and second sets of data and a second state indicative of a miscomparison between the first and second sets of data. In the preferred form of the invention, the control engine responds to the set comparison signal being in the first state to prevent a write of the first set of data to the array, and responds to the set comparison signal being in the second state to cause the nonvolatile memory system to write of the first set of data from the buffer to the array.
The nonvolatile memory cells are preferably flash memory cells. In addition, each set of flash memory cells typically includes a sector of cells to store a sector of data where a sector represents a quantity of data having the capacity of a sector of a conventional magnetic hard disk drive, such as 512 eight-bit bytes of data. In one form of the flash memory array, the array is organized into rows of cells, where each row of cells includes a sector of data plus extra bytes for ECC and overhead.
The buffer is preferably a random access memory (RAM), such as a synchronous RAM. The buffer is, however, alternatively embodied in an array of nonvolatile memory cells or some other memory circuit.
The present invention takes advantage of the characteristic of flash memory systems emulating magnetic hard disk drives that, in many cases, a file of new data to be written to the cells of a flash memory array correspond to a previously written file of xe2x80x9coldxe2x80x9d data, with many sectors of the new data being identical to corresponding sectors of the old data. The present invention provides an efficient method and circuitry for comparing new ECC check bits associated with data to be written to a set of cells of a flash memory array with ECC check bits associated with data already stored in the corresponding set of cells and writes the new data to the array only if the ECC check bits associated with the new data are not identical to the previously stored data check bits. In this way, the number of writes to a flash memory array is significantly reduced. By reducing the amount of writes to a flash memory array, there is less stress on the flash memory cells, which increases the operating life of the flash memory array and achieves better system reliability. In addition, system performance is greatly improved by reducing the time spent by the memory system in writing data to cells and reducing overall command overhead.
Specifically, the present invention performs a quick method of detecting if a file has been changed by calculating ECC check bits on incoming data and comparing these check bits against check bits stored in the flash memory array to check whether the data in the file has changed. The ECC method permits for a fast determination of whether the file has been changed and if the new data needs to be programmed to flash. The ECC method provides a fast method of making this determination and permits increased performance in a flash system. In addition, the ECC method reduces the average power consumed by the flash memory system and makes the flash memory system more reliable by reducing the number of times the memory is programmed over a given period of time.
In addition, because the present invention provides for calculation of an ECC code prior to storing data in the buffer, the buffer can be covered by the ECC. In this way, failed bits in the buffer can be detected and/or corrected.